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Reduced instruction set computer (RISC) represents a CPU design strategy emphasizing the insight that simplified instructions that "do less" may still provide for higher performance if this simplicity can be utilized to make instructions execute very quickly.
|“||a technology pioneered by IBM in the 1970s and further developed by researchers with funding from DARPA's Very Large Scale Integrated Circuit Program, which ran until the early 1980s.||”|
The term is being slowly replaced by the more descriptive load-store architecture. Well known RISC families include Alpha, ARC, ARM, AVR, MIPS, PA-RISC, PIC, Power Architecture (including PowerPC), SuperH, and SPARC.